Upon completing this lesson, you will be able to:
At the heart of every digital device—from the simplest calculator to the most powerful supercomputer—are circuits that perform logical operations. The fundamental building blocks of these circuits are called logic gates.
A logic gate is a tiny electronic circuit, typically made from a few transistors, that takes one or more binary inputs ($0$s and $1$s) and produces a single binary output based on a specific logical rule.
Think of them as simple decision-makers. They receive signals representing True ($1$) or False ($0$) and output a new True/False signal based on their predefined function. By combining millions or billions of these simple decision-makers, we can build circuits that perform incredibly complex tasks.
The behavior of a logic gate is described by its truth table, which lists all possible input combinations and the resulting output for each.
These three gates are the simplest and most fundamental operations in Boolean logic.
The AND gate is like a strict security checkpoint where two conditions must be met.
1 (True) only if all of its inputs are 1. If any input is 0, the output is 0.| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The OR gate is more lenient; it only requires one condition to be met.
1 (True) if at least one of its inputs is 1. The output is 0 only if all inputs are 0.| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
1, the output is 0. If the input is 0, the output is 1.| Input A | Output |
|---|---|
| 1 | 0 |
| 0 | 1 |
These two gates are special because you can create any other logic gate (AND, OR, NOT, etc.) by combining just NAND gates or just NOR gates. This makes them extremely important and cost-effective in circuit design.
As its name implies, a NAND gate is an AND gate followed by a NOT gate.
0 only if all of its inputs are 1. In all other cases, the output is 1. It is the exact opposite of an AND gate.| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |